SOC Diagnostic Framework Architect

DESCRIPTION OF POSITION:
The Diagnostic Engineering team is responsible for function, system, and stress validation tool development targeting next generation SoC products.
We are seeking a highly talent architect with solid knowledge of SW development and SoC architecture to define, design and develop framework which verifies SoC features of industry leading CIX products. The candidate will work with diagnostic teams and technical leads, to deliver framework for diagnostic team,  based on the key product features and validation strategies.
诊断工程团队负责针对下一代 SoC 产品的功能、系统和压力验证工具开发。
我们正在寻找一位在软件开发和 SoC 架构方面具有扎实知识的高素质架构师来定义、设计和开发框架，以验证行业领先的 CIX 产品的 SoC 功能。候选人将与诊断团队和技术负责人合作，根据关键产品功能和验证策略为诊断团队提供框架。
Responsibilities and Deliverables
• Definition, design,  and delivery of diagnostic framework.
• Collaborate with Diagnostic IP developers to collect requirements, this framework is also requested to be compatible with SLT framework.
• Collaborate with SOC arch team to understand hardware behavior, develop diagnostic framework which can support each IP diagnostic suites development.
• Bring-up and verification diagnostic framework on both pre-silicon environment (FPGA, C-Model, Palladium etc.) and post-silicon system (silicon and platform).
• 诊断框架的定义、设计和交付。
• 与诊断 IP 开发人员协作收集需求，该框架需要与 SLT 框架兼容。
• 与 SOC 架构团队合作，了解硬件行为，开发可以支持每个 IP 诊断套件开发的诊断框架。
• 硅前环境（FPGA、C-Model、Palladium等）和硅后系统（硅后平台）的启动和验证诊断框架。
Candidate Requirements:
• Rich experience in C/C++ and Linux kernel, hardware chip and system underlying driver development, debugging and testing;
• Knowledge of SOC architecture(CPU/GPU/NPU, memory subsystem and High speed IO etc.).
• Familiar with CPU/GPU and other complex chip underlying driver and IP verification development and debugging processes and tools, with rich experience in chip IP verification, underlying driver, board level debugging and chip testing cross-team cooperation;
• Familiar with the working principle and verification method of one or more CPU/GPU/NPU/PCIe/VPU/MC, power management and other complex IPs, and have relevant experience in DV or underlying driver or diagnostics software development;
• GPU/CPU IP verification, Linux driver/vBIOS/tools related system software development experience is preferred;
• Proven experience on driver, validation tool or embedded SW development and closely interact with HW designers and FW development team
• Familiar with Linux. Knowledge and experience of device driver or firmware development is required.
• Strong communication skills
• Highly organized, able to prioritize, and juggle multiple work streams to tight deadlines
• 丰富的C/C++和Linux内核、硬件芯片及系统底层驱动开发、调试和测试经验;
• 了解SOC架构（CPU/GPU/NPU, memory子系统和高速IO 等）。
• 熟悉CPU/GPU等复杂芯片底层驱动及IP验证开发调试流程及工具，具有丰富的芯片IP验证、底层驱动、板级调试及芯片测试跨团队协作经验;
• 熟悉一个或多个CPU/GPU/NPU/PCIe/VPU/MC、电源管理等复杂IP的工作原理和验证方法，有DV或底层驱动或诊断软件开发相关经验;
• 有GPU/CPU IP验证，有Linux驱动/vBIOS/工具相关系统软件开发经验者优先;
• 在驱动程序、验证工具或嵌入式软件开发方面拥有丰富的经验，并与硬件设计人员和固件开发团队密切互动；
• 较强的沟通能力，高度组织，能够确定优先级，并在紧迫的期限内处理多个工作流程。