职位&公司对比

职位详情

• 北京
• 3-5年
• 本科

• 半导体技术
• IC验证
• 电路设计
• Cadence

工作职责 Responsibilities: 1.Evaluate and optimize memory architecture and methodology in cutting-edge technology; 2.Design full custom circuits of IPs used in memory products; 3.Simulate, verify and analyze memory functionality and performance; 4.Oversee the layout and verification process includes floor-planning, placement直聘& routing, DRC/LVS; 5.Provide support to Product Engineering for silicon debug. 任职资格 Requirements: 1.8years+ DRAM circuit design experience is a must requirement; 2.Experience in LPDDR4 DRAMBOSS直聘 product design and verification would be a plus; 3.Deep knowledge and understanding of digital/analog circuits and CMOS device physics; 4.Familiar with EDA design tools such as Spectre, finebosssim, Hspice, Virtuoso, Calibre etc.; 5.Experience in mix-signal circuitry design and verification including circuitry implementation, timing analysis and optimization; 6.Good team player and commu来自BOSS直聘nication skills; 7.Good learning competency, self-motivated in a flexible and dynamic environment;8.Experience in ASIC design background such BOSS直聘as RTL coding, STA etc would be plus.